| AUBRAUX |
JitLab
Meas Definitions
Setup Time Definition
| DspSee Symbol |  |
It is the time difference between the selected data edges and the immediately succeeding selected clock edges.
| Active Clock Edge | Active Data Edge | Measures Setup Time Between ... |
| Falling* | Falling | Falling data edges & falling clock edges |
| Rising | Rising data edges & falling clock edges | |
| Both | All data edges & falling clock edges | |
| Rising* | Falling | Falling data edges & rising clock edges |
| Rising | Rising data edges & rising clock edges | |
| Both | All data edges & rising clock edges | |
| Both** | Falling | Falling data edges & all clock edges |
| Rising | Rising data edges & all clock edges | |
| Both | All data edges & all clock edges |
* Usable both for SDR (1 data edge/clock) & DDR (2 data edges/clock) systems.
** Meaningfull only for DDR systems.
| Significance of statistics: | |
| Mean | Important. The mean setup time should be as large as possible. |
| Min | Very important. The min setup time should be as large as possible. |
| Max | Not important. However max setup time larger than the half clock period will make a dent into the min hold time. |
| Peak cy-cy | Important. A higher cycle-to-cycle setup time indicates that the system is affected by noise or jitter or both. |
| Peak-to-peak | Important. A high peak-to-peak and a small cycle-to-cycle indicates presence of long-term jitter. |
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