| Significance of statistics: |
| Mean | The mean clock frequency should be as close to the required clock frequency as possible.
A lower frequency will result in a slower system speed.
A higher frequency will result in smaller timing margins. |
| Min | The min clock frequency should be as close to the required clock frequency as possible.
A lower clock frequency will result in lesser system speed. |
| Max | The max clock frequency should also be as close to the required clock frequency as possible.
A higher clock frequency will result in lesser timing margins. |
| Peak cy-cy | Very important. The peak cycle-to-cycle clock frequency should be as small as possible.
A higher value will result in higher cycle-to-cycle jitter and a smaller timing margin. |
| Peak-to-peak | The peak-to-peak value should be as small as possible.
Higher peak-to-peak values can cause problems with PLLs. |