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PLL Design Software
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Fig. 1 - PLL Block Diagram |
PLL Definitions/Notes
- Phase detector gain, Kd:
The phase detector generates an error voltage proportional to the difference
between reference phase and VCO phase. It is measured in volt/rad.
- VCO gain, Ko:
VCO stands for voltage controlled oscillator.
The PLL controls the VCO input voltage in order to provide the desired output frequency.
You can enter the VCO gain in either Hz/volt or rad/sec/volt.
- Loop bandwidth, fn:
This is the PLL loop bandwidth. You can enter it either in Hz or rad/sec.
This is one of the most critical factors determining the output phase noise, jitter and stability.
- Damping factor, ξ:
The damping factor decides the transient response of the PLL.
Mostly it is kept at 0.7071 since this value gives the best PLL performance.
- Phase margin, φ:
Phase margin should be ideally kept at 45 degrees.
- Feedback divider, N:
Keep this 1 if there is no frequency divider in the feedback path.
Otherwise, enter the frequency divider ratio.
- Scaling resistor, R1:
Normally, you are free to choose this value. Enter a value which results
in readily available R1, R2 & C2 values.
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